← All machines

Olivetti · M

Olivetti M10

1983 · Architecture: 80C85

1983 8-bit portable with an 80C85, battery-backed RAM, resident BASIC and a 240 × 64 LCD. It runs on the CoreMach engine.

ExperimentalImplemented in BluMach

EXPERIMENTAL: needs a BluMach build with CoreMach and the local 32 KB system ROM in roms/machines/olivetti_m10/. The bar-code reader, the modem and the low-battery warning are not emulated. Options are chosen when the machine is created; Settings does not change them.

Olivetti M10. Photograph
Photo: Museo Nazionale Scienza e Tecnologia Leonardo da Vinci · CC BY-SA 4.0 · View the original

History

Olivetti introduced the M10 in 1983 as a personal tool that fitted in a briefcase: it ran on four AA cells, kept programs and text in 8 to 32 KB of battery-backed RAM and carried in ROM a menu with an address book, text editor, communications and Microsoft BASIC. The design is credited to Perry A. King and Antonio Macchi Cassia. It is not IBM PC compatible: the processor is an 8-bit OKI 80C85, the display a tilting 240 × 64 dot LCD, and external storage was cassette.

It was built by Kyocera, which also made the Tandy TRS-80 Model 100 and a version for NEC, probably the PC-8201; MAME treats it as a variant of the Kyotronic 85. They share an origin but not an identity: case, board, keyboard, character set and ROM differ. MCmicrocomputer compared it with the Model 100 in February 1984. The European M10, without modem, came with Italian, French, German or British keyboards; the US M10 MODEM had a 300 bit/s modem and a ROM of its own that has not been preserved.

In BluMach, the M10 board is written for the CoreMach engine from the service manual and runs in its own window.

Hardware

Processor
OKI MSM80C85A at 2.4576 MHz (4.9152 MHz crystal)
Memory
8, 16, 24 or 32 KB battery-backed RAM in 8 KB modules; 32 KB system ROM
Video
Tilting 240 × 64 dot LCD, 40 × 8 characters, ten HD44102 drivers
Clock
NEC uPD1990AC calendar clock, running while switched off
Interfaces
RS-232C (IM6402), Centronics parallel, cassette with remote motor control, bar-code reader, 40-pin system bus
Keyboard
73 keys; Italian, French, German or British layout by jumpers
Sound
Buzzer driven by the 81C55 timer
Power
Four AA cells or 6 V DC; automatic power-off after 10 idle minutes

Catalogue classification

Form factor
Laptop
Mobility
Portable
Display technology
LCD
Display colour
Monochrome

Research

This page separates documented hardware facts, behavior observed in original firmware, and the current fidelity of BluMach emulation.

Architecture and memory

Evidence: documented or confirmed hardware

CPU and bus

OKI MSM80C85A, 8085 compatible, at 2.4576 MHz (CLK from a 4.9152 MHz crystal). 8-bit data bus multiplexed with the low address byte; there is no PC interrupt controller, DMA or keyboard controller.

Memory

32 KB system ROM at 0000h-7FFFh; RAM from FFFFh downwards in 8 KB modules (E000h, C000h, A000h, 8000h). An optional 32 KB ROM bank shares the same window and is not emulated. Empty addresses read FFh (assumption).

Video

240 × 64 dot LCD, 40 columns by 8 lines, with ten HD44102 drivers selected from the 81C55 at F0h-FFh. BluMach shows it at integer scales with optional dot grid, shadow and contrast; colours are approximate.

Keyboard and mouse

73 keys in a nine-row matrix with one diode per key, scanned by the 81C55 and read at E0h-EFh. Host keys map by position; CAPS LOCK latches like the original mechanism.

Serial and parallel

RS-232C through an IM6402 at C0h-DFh clocked by the 81C55 timer; Centronics with data on port A, STROBE on E0h bit 1 and BUSY on PC2; cassette through SOD and SID with the motor on E0h bit 3; buzzer through PB5 and the timer.

Clock and NVRAM

NEC uPD1990AC: time keeps running while the machine is off; its TP output drives RST 7.5 every 3.9 ms. BluMach keeps the clock and RAM in state/ in the machine folder.

Jumper bank

Jumpers J1-J4 select the keyboard language and are read on 81C55 PC4-PC5: Italian, French, German or British. They are chosen when the machine is created.

Analyzed firmware

First 32 KB of a local dump, with the CRC32 F0E8447A and SHA-1 that MAME declares for m10rom.m12. A VirtualT copy differs in two bytes, consistent with a century patch; it is not used. The ROM is not distributed.

Emulation status

Evidence: current BluMach status; not necessarily a description of the original circuit

Implementation lineage

CoreMach board model written from the service manual, the Kyocera schematic and each chip’s data sheet. MAME was consulted only as a secondary source for the order of the LCD drivers, the UART bits and the SLCT pin; none of its code is used. A public engineering note is available in English.

Screen controls

The contrast knob on the right side panel is reproduced in View › Contrast. Action gathers pause, reset, switching on after the automatic power-off, sound, serial port, cassette and printer.

Verified

With the real ROM: menu and BASIC with the bytes free the guide gives for 8, 16, 24 and 32 KB; RAM and clock across sessions; power-off after ten idle minutes; BEEP and SOUND; SAVE and LOAD through “COM:” at 9600 bit/s; CSAVE and CLOAD on tape, including an 11025 Hz WAV; and LPRINT and LLIST.

Pending or approximate

Timing is computed per instruction, not per bus cycle. The serial port works per character, without BREAK or RTS, DTR and CTS. The signal to tape is a square wave. SLCT on PC1 and the tape thresholds are assumptions. A tape recorded on a real M10 and the BEEP tone against the machine remain to be checked.

Engineering

This public engineering narrative explains how the evidence became an emulator implementation, including failures, compromises, validation and replacement criteria.

Read the engineering note

Sources

Machine-translated and checked with several tools. Spotted a mistake? Let me know.